1. Field of the Invention
The present invention relates to a semiconductor memory cell, particularly, to a memory cell used in, for example, a dynamic random access memory (DRAM).
2. Description of the Related Art
FIG. 1 shows a memory cell widely used nowadays in a DRAM. As shown in the drawing, the memory cell comprises a MOS (insulated gate) type transistor Q acting as a transfer gate, which is connected to a word line WL and a bit line BL, and a capacitor C for information storage having a capacitor plate potential VPL connected to one end thereof.
The cells developed in an attempt to enhance the integration density of the DRAM cell of such a one transistor-one capacitor type include (a) a trench cell which utilizes a capacitor formed inside a trench formed on a substrate surface, and (b) a stacked cell constructed such that a capacitor comprising polysilicon films and an insulating film interposed between the polysilicon films is stacked on a transfer gate. Further, proposed is a cross point type cell constructed such that a single MOS transistor acting as a transfer gate and a single capacitor for information storage are arranged in a vertical direction, as disclosed in (1986 ISSCC Digest of Tech. Papers, pp. 268-269,"A 4 Mb DRAM with Cross-point Trech Transistor Cell " by A. SHAH et al.).
However, the conventional memory cells outlined above necessitate a highly complex manufacturing process and a long manufacturing time. It is considered very difficult to overcome these difficulties as a result of researches on the trench cell, etc. noted above.